1. Field of the Invention
This invention relates to a method of producing semiconductor devices, particularly to a method of forming the base region and emitter region in a bipolar transistor formed in a bipolar type semiconductor device.
2. Description of the Prior Art
In a bipolar type semiconductor integrated circuit device, as a method of improving integration density, it has been proposed to realize dielectric isolation between the active element or passive element formed on the semiconductor substrate or layer by the so-called dielectric isolation method.
Such a dielectric isolation method utilizes an oxide material such as silicon dioxide, as an isolation material. The isolation material is formed by oxidizing the semiconductor substrate or layer up a the specified depth, for example, by the selective or local oxidation method using a silicon nitride film as the mask. In the formation of a bipolar type semiconductor integrated circuit device having a dielectric isolation structure for example a bipolar transistor using an oxide as an isolation material, allows the isolation region, the collector contact region forming window and the base region forming window to be formed at the same time by using a composite photo mask. Therefore, the dielectric isolation method is very effective for improving integration density because it forms small size transistors. In this method, the base region is formed by introducing the acceptor impurity using a thick oxide film formed by the selective oxidation method as a mask.
However, even in such bipolar transistor formed by the dielectric isolation method, the emitter region forming window, formed within said base region, is not self-aligned with the base region. For this reason, a sufficiently large margin for alignment is required between the emitter region forming window and the base region forming window. Therefore, if the photo mask is misaligned at the time of forming the emitter region forming window, not only the insulating film on the base region but also the field insulating film around the base region are removed by the etching, and when the specified impurity is introduced through the emitter region forming window, the emitter and collector become short-circuited. A short-circuit between the emitter and the collector naturally drastically deteriorate the production yield and the reliability of semiconductor devices.
Thus, for example, a means, as indicated in FIG. 1 to FIG. 3 has been proposed in order to eliminate the problem occurring at the time the photo mask is aligned.
In regard to FIG. 1:
(1) In accordance with said existing method, an n type silicon epitaxial layer 12, formed by the epitaxial growth method, is formed on a P type silicon (Si) semiconductor substrate 11. An n.sup.+ type buried layer 13, is selectively formed at the surface of the P type silicon substrate 11 prior to formation of the P type epitaxial layer 12.
(2) The surface of the n type epitaxial layer 12 is selectively or locally oxidized using as the mask a silicon nitride (Si.sub.3 N.sub.4) layer (not shown) and a field insulating layer 14 consisting of silicon dioxide (SiO.sub.2) is formed.
(3) The silicon nitride layer is removed.
(4) A polycrystalline silicon layer 15 is formed covering the field insulating layer and exposed n type epitaxial layer 12.
(5) The P type base region 16 is then formed by introducing the acceptor impurity through the polycrystalline silicon layer 15.
(6) Moreover, the P.sup.+ type base contact region 17 is formed by depositing a photoresist layer (not shown) on the polycrystalline silicon layer 15 and by introducing, the acceptor impurity in a high concentration with the photoresist used as a mask.
In regard to FIG. 2:
(7) The silicon nitride film pattern 18a corresponding to the emitter region forming window and the emitter electrode contact window and the silicon nitride film pattern 18b corresponding to the base electrode contact window are formed on the polycrystalline silicon layer 15.
(8) The polycrystalline silicon layer 15 is selectively oxidized using the silicon nitride film patterns 18a and 18b as a mask, thereby converting the unmasked polycrystalline silicon layer and a part of the surface of the P type silicon layer 12, located thereunder, to a silicon dioxide film 19.
In regard to FIG. 3:
(9) The silicon nitride film patterns 18a and 18b are then removed. As a result, the underlying polycrystalline silicon layers 15a and 15b are exposed.
(10) The n.sup.+ type emitter region 20 is formed by introducing the donor impurity in a high concentration into the exposed region through the polycrystalline silicon layer 15a by ion implantation with a photo resist (not shown) mask or by solid to solid diffusion.
(11) The emitter electrode 21 and base electrode 22 are formed by depositing a metal material such as aluminum (Al) on the polycrystalline silicon layers 15a, 15b. In such a method, the window opening formation, using photo etching, is carried out before the emitter region is formed.
Therefore, if a part of the emitter region is in contact with a field insulating layer, the short-circuit between the emitter and collector, as explained previously, does not occur.
As a result, such a method realizes a so-called walled emitter structure where a part of the emitter region is placed in contact with the field insulating layer. This walled emitter structure is effective for reducing the area occupied by the transistor and also effective for realizing high integration density and high performance of the bipolar type integrated circuit device.
According to the method shown in FIG. 1 to FIG. 3, the insulating film 19a which isolates the emitter region forming window/emitter electrode window and the base electrode window is formed from the oxide material created from the polycrystalline silicon layer 15, and oxidation of the surface of the silicon epitaxial layer under the polycrystalline silicon layer 15. The insulating film formed by the oxidation of the polycrystalline silicon layer is comparatively porous and has low insulation characteristics. In addition, a crystal defect is induced at the epitaxial layer surface (boundary to the oxide film) under the oxide film by selective oxidation of the silicon epitaxial layer surface using the silicon nitride film pattern as a mask. Therefore, a bipolar type semiconductor device formed by such a method does not sufficiently improve the electrical characteristic and reliability.